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| THURSDAY, June 10, 2004, 2:00 PM - 4:00 PM | Room: 4 |
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TOPIC AREA: PHYSICAL CIRCUIT DESIGN
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SESSION 50
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| Numerical Techniques for Simulation
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| Chair: Joel R. Phillips - Cadence Design Systems, Inc., San Jose, CA
| | Organizers: Jacob K. White, Kartikeya Mayaram
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| The five papers in this session on numerical techniques address a variety of issues in simulation. In the first paper, the problem of simulating complicated analog and RF circuits is addressed using a combination of partitioning, macromodeling, and iteration. The second paper examines the numerical stability issues associated with handling two time scale problems with multitime partial differential equation methods. The problems of predicting substrate noise in mixed signal systems is addressed in the third paper. Techniques for improving simulation efficiency is the subject of the last two short papers. The first paper of the pair exploits hierarchy to accelerate symbolic analysis and the second paper describes the latest approaches for using table models in circuit simulation.
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| 50.1 |
A Frequency Relaxation Approach for Analog/RF System-Level Simulation
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| Speaker(s): | Xin Li - Carnegie Mellon Univ., Pittsburgh, PA
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| Author(s): | Xin Li - Carnegie Mellon Univ., Pittsburgh, PA
Yang Xu - Carnegie Mellon Univ., Pittsburgh, PA
Peng Li - Carnegie Mellon Univ., Pittsburgh, PA
Padmini Gopalakrishnan - Carnegie Mellon Univ., Pittsburgh, PA
Lawrence T. Pileggi - Carnegie Mellon Univ., Pittsburgh, PA
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| 50.2 | Robust, Stable Time-Domain Methods for Solving MPDE of Fast/Slow Systems |
| Speaker(s): | Ting Mei - Univ. of Minnesota, Minneapolis, MN
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| Author(s): | Ting Mei - Univ. of Minnesota, Minneapolis, MN
Jaijeet Roychowdhury - Univ. of Minnesota, Minneapolis, MN
Todd S. Coffey - Sandia National Laboratories, Albuquerque, NM
Scott A. Hutchinson - Sandia National Laboratories, Albuquerque, NM
David M. Day - Sandia National Laboratories, Albuquerque, NM
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| 50.3 | High-Level Simulation of Substrate Noise in High-Ohmic Substrates with Interconnect and Supply Effects |
| Speaker(s): | Geert Van der Plas - IMEC, Leuven, Belgium
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| Author(s): | Geert Van der Plas - IMEC, Leuven, Belgium
Mustafa Badaroglu - IMEC, Leuven, Belgium
Gerd Vandersteen - IMEC, Leuven, Belgium
Petr Dobrovolny - IMEC, Leuven, Belgium
Piet Wambacq - IMEC, Leuven, Belgium
Stephane Donnay - IMEC, Leuven, Belgium
Georges Gielen - Katholieke Univ. , Leuven , Belgium
Hugo De Man - IMEC, Leuven, Belgium
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| 50.4s | Hierarchical Approach to Exact Symbolic Analysis of Large Analog Circuits |
| Speaker(s): | Zhenyu Qi - Univ. of California, Riverside, CA
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| Author(s): | Sheldon Tan - Univ. of California, Riverside, CA
Weikun Guo - Univ. of California, Riverside, CA
Zhenyu Qi - Univ. of California, Riverside, CA
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| 50.5s | An Essentially Non-Oscillatory (ENO) High-Order Accurate Adaptive Table Model for Device Modeling |
| Speaker(s): | Baolin Yang - Cadence Design Systems, Inc., San Jose, CA
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| Author(s): | Baolin Yang - Cadence Design Systems, Inc., San Jose, CA
Bruce MacGaughy - Cadence Design Systems, Inc., San Jose, CA
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